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Alif Semiconductor /AE512F80F5582LS_CM55_HP_View /LPI2S /I2S_CER

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Interpret as I2S_CER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)CLKEN

CLKEN=Val_0x0

Description

Clock Enable Register

Fields

CLKEN

Clock Generation Enable or Disable. This bit enables or disables the clock generation signals when the I2S module is a master: SCLK_EN, WS_OUT, and SCLK_GATE. For more information about clock generation, refer to Section I2S Clocks.

0 (Val_0x0): Clock generation disabled

1 (Val_0x1): Clock generation enabled

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data